Speaker |
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Viktor K. Prasanna
University of Southern California
Viktor K. Prasanna is Charles Lee Powell Chair in
Engineering in the Ming Hsieh Department of Electrical Engineering and Professor of Computer Science at the University of Southern
California. He is the executive director of the USC-Infosys Center for Advanced Software Technologies (CAST). He is also a member of
the USC-Chevron Center of Excellence for Research and Academic Training on Interactive Smart Oilfield Technologies. His research
interests include parallel and distributed systems including networked sensor systems, embedded systems, configurable architectures
and high performance computing. He has served on the editorial boards of the Journal of Parallel and Distributed Computing,
Proceedings of the IEEE, IEEE Transactions on VLSI Systems, and IEEE Transactions on Parallel and Distributed Systems. He served as
the Editor-in-Chief of the IEEE Transactions on Computers during 2003-06. Prasanna was the founding Chair of the IEEE Computer
Society Technical Committee on Parallel Processing. He is the steering chair of the IEEE International Conference on High Performance
Computing (www.hipc.org).
He is a Fellow of the IEEE and the ACM. He is a recipient of 2009 Outstanding Engineering Alumnus Award from the Pennsylvania State
University. |
![](images/prasanna.jpg)
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Abstract |
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Reconfigurable devices and systems have evolved dramatically over the past decade. Recently, several state-of-the-art high end
platforms have incorporated FPGAs (Field Programmable Gate Arrays) for application acceleration. This talk explores algorithmic
optimizations for accelerating a wide variety of applications including Gigabit rate deep packet inspection, high speed packet
classification in Internet routers, embedded computing and scientific computing. We illustrate the performance improvements for such
systems and demonstrate the suitability of FPGAs for these computations. The performance of FPGAs is also compared against those of
state-of-the-art embedded processors, general purpose processors, and DSPs (Digital Signal Processors) for floating point intensive
applications. We conclude by highlighting the challenges in further exploiting this technology for application acceleration.
http://ceng.usc.edu/~prasanna/ |
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