Dr. Mandeep Narula

Assistant Professor (SR. GRADE)

mandeep.narula@jiit.ac.in

Education

PhD, Electronics Engineering, JIIT (2019-2023)
M.Tech, Microelectronics & VLSI, IIT Kharagpur (2006-2008)
B.Tech, Electronics & Communication Engineering, Kurukshetra University (2001-2005)

Biography

Total Teaching Experience – 14 Years

Total Industry Experience – 2 Years

Work Experience

Assistant Professor – Sr. Grade, JIIT, Sec 62 Noida, (November 2023 – Present)
Assistant Professor – II, JIIT, Sec 62 Noida, (October 2015 – October 2023)
Assistant Professor – II, G.D Goenka University, Gurgaon (June 2013 – October 2015)
Assistant Professor, ITM University, Gurgaon (January 2011 – June 2013)
Assistant Professor, AKGEC affiliated to UPTU (July 2010 – December 2010)
ASIC Design Engineer – 2 in Infinera, Bangalore (April 2010 – July 2010)
VLSI Consultant in Transwitch, Delhi (July 2009 – April 2010)
Senior Member Technical Staff in Mentor Graphics, Noida (June 2008 – July 2009)

Interest Area(s)

Novel Semiconductor Devices (Nanowire, Nanosheet, Gate All Around FET, FinFET etc),CMOS Digital Design, RTL Design, Analog Circuit Design, High Speed and Low Power CMOS Circuits, Digital System Design with VHDL/Verilog.

Publications

International Journals

Mandeep Singh Narula, Archana Pandey, “Dual-Gate Silicon Nanowire FET with a Corner Spacer for High Performance & High Frequency Applications” –Journal of Electronic Materials, vol. 52, issue 10, pp. 6708-6718, July 2023, Indexed in SCI and SCOPUS, Impact factor – 2.047 (From my PhD Work)
Mandeep Singh Narula, Archana Pandey, “Gate Engineered Silicon Nanowire FET with Coaxial Inner Gate for Enhanced Performance”, Silicon Journal, Vol 15, Issue 10, pp. 4217 – 4227, Feb 2023 - Indexed in SCI and SCOPUS, Impact factor – 2.941 (From my PhD Work)
Mandeep Singh Narula, Archana Pandey, “Performance Evaluation of Stacked Gate Oxide/High K Spacers Based Gate All Around Device Architectures at 10 nm Technology Node”, Silicon Journal, Vol 14, Issue 5, pp 2397 – 2407, April 2022 - Indexed in SCI and SCOPUS, Impact factor – 2.941 (From my PhD Work)
Abhaya Goel , Mandeep Singh Narula, “Smart Helmet With Alcohol Sensor”, International Research Journal of Engineering and Technology, Vol. 10, No. 5, May 2023
Shivangi Gupta; Dhruv Kumar Sharma; Mandeep Singh Narula, “License Plate Detection, Recognition and Speed Estimation of Vehicles”, International Journal of Innovative Science and Research Technology, Vol. 8, No. 4, April 2023
Snehima Gupta, Vivek Shukla, Mandeep Singh Narula, “Detection of Covid-19, Skin Cancer and Malaria using AI and Image Processing”, ”, International Research Journal of Engineering and Technology, Vol 9, Issue 5, May 2022
Anushi Jain, Shivangi Gupta, Mandeep Singh Narula, “Loan Default Risk Assessment using Supervised Learning, International Journal of Innovative Science and Research Technology”, Vol. 7, Issue 5, May 2022
Eshitaa Puri, Anjali, Mandeep Singh Narula, “Bluetooth based Home Automation System Using Arduino”, International Journal of Advances in Engineering and Management, Vol. 4, Issue 5 May 2022
Muskan Dhirwani, Kartikey Tiwari, Mandeep Singh Narula, “E-Mail Spam Detection Using Supportive Vector Machine”, International Research Journal of Engineering and Technology, Vol. 9, Issue 5, June 2022
Akshay Goel, Mandeep Singh Narula, “De-Anonymization of Electronic Mail”, International Research Journal of Engineering and Technology, Vol 8, Issue 5, May 2021
Akshay Goel, Raksha Tandon, Mandeep Singh Narula, “Sign Recognition and Speech Translation Using OPENCV”, International Research Journal of Engineering and Technology, Vol 7, Issue 11, pp. 982-985, Nov 2020
Mandeep Singh Narula, Nishant Singla, “FPGA Implementation of Image Enhancement Using Verilog HDL”, International Research Journal of Engineering and Technology, Vol 5, Issue 5, May 2018
Nishant Singla, Mandeep Singh Narula, “FPGA Implementation of Snake Game Using Verilog HDL”, International Research Journal of Engineering and Technology, Vol 5, Issue 5, May 2018
Mitul Mehrotra, Geetika Pandey, Mandeep Singh Narula, “Implementation of FFT Algorithm”, International Journal of Engineering Science & Research Technology, Vol 6, Issue 5, May 2017
Ankita Gupta, Mandeep Singh Narula, Sandeep Shrivastava, “Implementation of Proposed High Speed, Low Power 16 Bit Multiplier”, International Journal of Engineering Research in Electronics and Communication Engineering, Vol 4, Issue 4, April 2017
Mandeep Singh Narula, Ramandeep Singh, “Verilog Implementation, Synthesis & Physical Design of MOD 16 Counter”, International Journal of Engineering Sciences & Research Technology, Vol 3, Issue 10, October 2014
Mandeep Singh Narula, Simarpreet Singh, “Implementation of Triple Data Encryption Standard using Verilog”, International Journal of Advanced Research in Computer Science and Software Engineering, Vol 3, Issue 12, pp 1172-1177, January 2014
Manish Choudhary, Mandeep Singh Narula, “FPGA implementation of Booth's and Baugh-Wooley Mutiplier Using Verilog”, International Journal of Innovative Technology and Exploring Engineering, Vol 3, Issue 1, pp. , May 2013
Manish Choudhary, Mandeep Singh Narula, “High Speed Modified Booth’s Multiplier for Signed and Unsigned Numbers”, International Journal of Science and Engineering Investigations, Vol 2, Issue 12, pp. 106-113, January 2013
Mandeep Singh Narula, Pankaj Rakheja, Charu Rana, “Giga bit per second Differential Scheme for High Speed Interconnect” International Journal of VLSI Design & Communication Systems, Vol.3, No.1, February 2012
Charu Rana, Pankaj Rakheja, Mandeep Singh Narula, “Mechanism for Enhancing the Overall Performance of Multicore Processors”, International Journal of Scientific and Engineering Research, February 2012

International Conferences

Mandeep Singh Narula, Archana Pandey, “A Comprehensive Review on FinFET, Gate All Around, Tunnel FET : Concept, Performance and Challenges”, IEEE International Conference on Signal Processing & Communication, Dec 2022 - Indexed in SCOPUS (From my PhD Work)
Raghav Dwivedi, Mandeep Singh Narula, “USB 2.0 Transceiver Macrocell Interface Implementation on Xilinx Vivado”, IEEE International Conference on Signal processing & Communication held at Jaypee University, Noida on 26-28 December 2016
Mandeep Singh Narula, “Transmitter for High Speed I/O using Current Mode Signalling” presented at the International Conference on VLSI, MEMS and NEMS held at Amity University, Noida on 24th and 25th Jan 2012
Pankaj Rakheja, Mandeep Singh Narula, “Design of 8T, 10T & 28T High Speed Low Power Full Adder”, International Conference on Recent Developments in Science, Engineering and Technology, October 2015
Navneet Sharma, Mandeep Singh Narula, “Colored Balls Sorting & Counting Using Microcontroller”, International Conference on Recent Developments in Science, Engineering and Technology, October 2015
Shreya Prakash, Mandeep Singh Narula, “Implementation of High Speed Digital NMOS Input Buffer Design”, International Conference on Recent Developments in Science, Engineering and Technology, October 2015
Nankita Asija, Renu Saini, Pankaj Rakheja and Mandeep Narula, “A Unique Circle Cipher Approach using Audio Stenography for Network Security”, International Conference on Recent Developments in Science, Engineering and Technology, October 2015

National Conferences

Mandeep Singh Narula, Manoj Sharma, “A Novel Approach to Smart Grid Architecture”, DST Sponsored National Conference on Development & Advancement in Smart Grid For Solar Renewable Energy held on April 16, 2016, at Dronacharya College of Engineering, Gurgaon
Mandeep Singh Narula, Ramandeep Singh, “Implementation of DLL based Serializer”, presented at the National Conference on Recent Developments in Science, Engineering and Technology, 17-18 October 2014, G D Goenka University, Gurgaon
Ramandeep Singh, Mandeep Singh Narula, Kandla Arora, “Strategizing PWM Application for LED Based Industrial Testing Light Panels”, National Conference on Recent Developments in Science, Engineering and Technology, 17-18 October 2014, G D Goenka University, Gurgaon
Manish Choudhary, Mandeep Singh Narula, “An Efficient Implementation Technique for 8 Bit and 16 Bit Binary Multiplication Using Verilog”, National Conference on Contemporary Techniques & Technologies held at DCRUS&T, Murthal, March 2013

Achievements

Secured 99.80 percentile (AIR – 125) in GATE 2006 exam
Secured 98.14 percentile in GATE 2005 exam
GATE Fellowship for M.Tech. (VLSI) programme, Indian Institute of Technology, Kharagpur, (Awarded by Ministry of Human Resource Development (MHRD), Govt. of India) for 2006-2008.
Awarded with Certificate of Appreciation for conducting Workshops on RTL Design and Verification & Virtual Labs
Reviewer of VLSICS Journal - International Journal of VLSI Design & Communication Systems
Reviewer of Journal of Semiconductor
Completed Online Course – Control of Mobile Robots (Georgia Institute of Technology, with distinction – 88.6%), Jan 2014 - March 2014
Completed Online Course – Solar Cell, Fuel Cell & Batteries (Stanford University), Sept 2013 - Dec 2013

Workshop & Conferences Attended

Attended one week Faculty Development Program on “Advance Techniques in Wireless Communication" from July 13^th – 20^th July 2023 at Jaypee University, Noida
Attended Six days Faculty Development Program on “Advanced Research Trends in Signal and Image Processing" from July 28^th - 3^rd Aug 2022 at Jaypee University, Noida
Attended Six days Faculty Development Program on “Outcome based research: VLSI Devices, Circuit Analysis, Latest Design Tools and Applications " from July 21^st - 27^th July 2022 at Jaypee University, Noida
Attended five days Faculty Development Program on “VLSI Exposure and it’s Challenges in Engineering" from 11^th July - 15^th July 2022 at Krishna Universit
Attended five days Training Program on “Emerging Tools and Techniques in VLSI, MEMS & MOEMS" from Jan 25^th -29^th 2022 at Swami Keshvanand Institute of Technology, Management & Gramothan, Jaipur
Attended Six days Faculty Development Program on “Advancement in wireless communication technology, networking and applications" from March 21^st - 25^th 2022 at CVR college of engineering, Hyderabad
Attended Six days Faculty Development Program on “Advancement in wireless communication and signal processing" from July 26^th - 31^st 2021 at Jaypee University, Noida
Attended Six days Faculty Development Program on “Recent trends of artificial intelligence in Electronic Devices and Systems" from July 19^th - 24^th 2021 at Jaypee University, Noida
Attended Six days Workshop on “CAD Tools for VLSI and Smart Systems” from Oct 7^th - 14^th 2021 at Jaypee University, Noida
Attended Six days Faculty Development Program on “VLSI Chip Design Hands on using Open Source EDA" from July 8^th -12^th 2019 at Jaypee University, Noida
Attended Six days Faculty Development Program on “Modern RF and Optical Wireless Communication Systems"from July 9^th -14^th 2018 at Jaypee University, Noida
Attended Six days Faculty Development Program on “Recent Trends in Signal processing” from July 10^th -15th 2017 at Jaypee University, Noida
Attended Two Days Workshop on “Embedded System & FPGA” from July 17^th -18^th, 2017 at jaypee University
Attended Six days Faculty Development Program on 'Communication Engineering : Recent Trends' from July 11-16, 2016 at Jaypee University, Noida
Attended Six Days Workshop on Open Source Alternatives for Engineering in July 2015
Attended One Day FDP on Effective Mentoring in Dec 2014
Attended Two Days Workshop on Robotix, in Jan 2014 conducted by Sparklab Engineering System (affiliated with IIT Guwahati)
Attended One Day Workshop on Networking & Security, Nov 2013 conducted by Network Bulls
Attended Two Days Faculty Development Program conducted by Advait Life Education Pvt Ltd, Noida in July 2012
Attended One Day Training Program on Virtual Lab held in May 2012 at IIT Delhi
Attended Three Days Workshop on NEN (National Entrepreneurship Network) Faculty Development Programme held during 19th – 21st August 2011 at JIMS, Delhi
Attended One Day NEN Orientation Program on 8th July 2011 at ITM University
Attended Two Days Workshop on Deployment and Use of NPTEL (National Programme on Technology Enhanced Learning) held in October 2010 at JSS Academy of Tech Education, Noida
Attended Two Days Training Program on Virtual Lab held in September 2010 at IIT Delhi